Design Verification Engineer
Hkm hr management pte ltd
- Jurong East New Town
new offer (14/05/2024)
job description
Responsibilities:
- Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
- Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
- Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
- Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
- Collaborate with design engineers to troubleshoot and resolve simulation issues.
- Provide support to test engineers during post-silicon validation.
- Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.
Requirements:
- Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
- Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
- Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
- Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
- Experience in verifying designs at RTL and post-P&
R gate levels.
Work Schedule:
This job has the following work schedule:
5 days / week
Office hours
Flexible
Benefits &
Perks
This job has the following benefits:
Profit sharing
Training &
professional development
Life insurance
This job is located in Jurong East, West, Singapore.
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